This invention relates to image detection and to the translation of two-dimensional electromagnetic radiation flux patterns into electrical and other forms.
Image detection technology has been given impetus within the last decade by the rapid development of semiconductor technology. One potential advantage of semiconductor technology is the use of an xy array of closely spaced sensing elements to obtain two-dimensional sensing capability without the need to scan an image.
One example of a two-dimensional xy array of sensing elements is disclosed in U.S. Pat. No. 3,465,293 issued Sept. 2, 1969. The patent discloses an image detector in which a row by column array of photodetectors are connected in series with and modulate the current provided by a corresponding array of MOSFETs. The current amplitude of each MOSFET varies with the intensity of light incident upon its associated photodetector.
Two-dimensional sensing arrays are also available which use charge-coupled device (CCD) sensors and for infrared as well as radiation sensing.
Recently, semiconductor image detection has been expanded through the use of conductor-insulator-semiconductor (CIS) capacitors as sensing elements to provide transient storage of the analog of electromagnetic radiation. An example of CIS capacitive sensing elements is disclosed in U.S. Pat. No. 3,781,827 issued Dec. 25, 1973. This patent discloses a row-by-column array of two transistor-one capacitor sensing cells. The field plate of each capacitor is connected to the drain of an associated FET, which controls charging of the capacitor. When the array is subjected to radiation of the appropriate wavelength, the charge is degraded by minority carriers generated within the semiconductor, thus changing the voltage associated with the field plate. The field plate is connected as the gate of the second FET so that the change in gate voltage is translated as a change in current of the second FET. This current change is thus a measure of the integrated electromagnetic flux incident upon the semiconductor substrate after the initial charging of the capacitor.
The emphasis of semiconductor technology on decreasing the surface area and the number of elements necessary to perform a particular function is reflected in the simplification of image detection elements. U.S. Pat. No. 3,906,544 issued Sept. 16, 1975 to Engler and Tiemann uses a one capacitor-one transfer gate detector-storage element and is believed to represent the current state of imaging art.
The CIS capacitive storage element in U.S. Pat. No. 3,906,544 includes a charge storage region, a charge transfer region and a charge receive region. Charges generated proportional to incident electromagnetic radiation are stored at the charge storage region at the substrate surfaces adjacent the capacitor gate. Transfer gates, associated one to a storage element, control the transfer of charge from selected storage elements to an output circuit for use as a video signal, while holding and integrating other electrical charges in their storage elements. Transfer of charge is along the substrate surface via a depletion region associated with a conductor or a diffused region. The sensitivity of the array can be controlled by adjusting the charge integration time. Apparently, the video signal is proportional to the amount of charge, i.e., to the incident radiation.
Despite the advantages resulting from application of semiconductor technology, this exemplary art indicates that the utility of semiconductor image detectors is limited by destructive readout (DRO). That is, once a cell is read out, the information is effectively destroyed. Also, there is no capability for information processing such as error correction.